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Sony plans to invest 35 billion yen in its Nagasaki Technology Center ("Nagasaki TEC") and Kumamoto Technology Center ("Kumamoto TEC") from the H2 of the fiscal year ending March 31, 2015 (FY14) through the H1 of the fiscal year ending March 31, 2016 (FY15), to increase its production capacity for stacked image sensors. The investment is intended to reinforce Nagasaki TEC's "layering process" production capabilities, as well as Kumamoto TEC's "mastering process" facilities. "
The layering process refers to the layering semiconductor chips containing back-illuminated structure pixels with semiconductor chips containing the circuit for signal processing. The mastering process refers to the manufacture of photodiodes and wiring processes for stacked CMOS image sensors."
On January 29, 2014, Sony announced its plans to establish and invest in Yamagata TEC as a facility mainly conducting the mastering process. The current investment is expected to enable Sony to complete subsequent stages of production, including the layering process, at Nagasaki TEC on semiconductor chips that have undergone the mastering process at Yamagata TEC, providing Sony with a fully integrated production system for stacked CMOS image sensors. This investment is a part of Sony's mid - to long-term plan to increase its total production capacity for image sensors to approximately 75,000 12-inch wafers per month, and is expected to increase the current capacity of approximately 60,000 wafers per month to approximately 68,000 wafers per month by August 2015.
Over FY14, Sony is going to invest approximately 9 billion yen (Nagasaki TEC: 3 billion, Kumamoto TEC: 6 billion). Approximately 26 billion yen is to be invested in FY15 (Nagasaki TEC).
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Nagasaki Technology Center (left) and Kumamoto Technology Center (right) |
Thanks to DG for the news.
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