- 1394 LLC
- 5x4Gbps CRC generator designed with standard cells
- 8 bit Microcontroller
- 8 bit Microprocessor
- 8048 µController
- Adaptive Filter design
- ADPCM algorithm
- Arm core
- Basic DES crypto core
- Basic RSA encryption engine
- CISC processor design
- CPU Generator
- Cryptographic communication
- Cryptographic controller design
- CV001 CORDIC core
- Debit card
- DES Algorithm design
- Design and implementation of 2D DWT architecture
- Design and implementation of acoustic echo canceller
- Design and implementation of adaptive beam former for sonar system
- Design and implementation of adaptive noise canceller
- Design and implementation of declination filter
- Design and implementation of digital architecture of support vector machine
- Design and implementation of distributed arithmetic algorithm based FIR filter
- Design and implementation of energy scalable system design
- Design and implementation of fuzzy logic controller
- Design and implementation of histograms accumulator buffer
- Design and implementation of image compression technique
- Design and implementation of image segmentation using VLSI
- Design and implementation of noise cancellation using recursive least square
- Design and implementation of packet scheduling algorithm for ATM switches
- Design and implementation of read salmon decoder
- Design and implementation of safer encryptions algorithm in blue tooth using
- Designing an active noise control system using DSP and VLSI
- DMT Transceiver
- E1 Framer/De framer
- Electronic voting machine
- FIR & IIR filter designing
- First File Reader FAT16
- Fuzzy controller design
- Fuzzy Logic Hardware Accelerator
- HDB3/B3ZS Encoder + Decoder
- Home appliances control designing
- I2C controller core
- Identity card designing
- Image processing
- Image processing in VLSI
- ISA bus design
- JOP: a Java Optimized Processor
- Linear Predictive Coding
- List of VLSI projects
- Mini MIPS
- Motion Detection From Image Sequences Using A New Fully Digital VLSI
- MP3 decoder
- Neural Architecture PID controller
- Object counter designing
- PCI bus design
- Plasma - most MIPS I(TM) Epodes
- Quadrature Decoder / Counter
- Railway barrier monitor
- RISC coprocessor designing
- RISC5x
- RSA Algorithm design
- Security system
- Single clock unsigned division algorithm
- SISC processor design
- Smart card designing
- SPDIF Interface
- Spectrum analyzer
- Stepper Motor Controller
- System680
- system6805
- System6809
- System6811
- Traffic light controller
- UART designing
- Vending machine
- Wireless attendance recorder cum security system
- WISHBONE Builder
- Wishbone System6800/01
SOURCE: www.researchprojects.info
