His implementation is a hardware-efficient single-step 5x5 pixel algorithm, which performs a zipper-free high-quality Bayer-pattern interpolation up to the theoretical frequency limit, color-anti-aliasing, sharpness enhancement and noise reduction together. The pictures look very convincing. Basler has currently a single-lane FPGA implementation with a throughput of 140 MPix/s using 880 Cyclone V logic cells and a quad lane implementation with a throughput of 400 MPix/s using 2600 logic cells. Jörg says, Basler is interested in licensing, cross-licensing or technology exchange.
Basler Improves on Demosaicing Algorithms
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Jörg Kunze from Basler AG kindly allowed me to publish few slides from his presentation at the London Image Sensors 2016 conference about his novel Debayering algorithm called PGI.
His implementation is a hardware-efficient single-step 5x5 pixel algorithm, which performs a zipper-free high-quality Bayer-pattern interpolation up to the theoretical frequency limit, color-anti-aliasing, sharpness enhancement and noise reduction together. The pictures look very convincing. Basler has currently a single-lane FPGA implementation with a throughput of 140 MPix/s using 880 Cyclone V logic cells and a quad lane implementation with a throughput of 400 MPix/s using 2600 logic cells. Jörg says, Basler is interested in licensing, cross-licensing or technology exchange.
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His implementation is a hardware-efficient single-step 5x5 pixel algorithm, which performs a zipper-free high-quality Bayer-pattern interpolation up to the theoretical frequency limit, color-anti-aliasing, sharpness enhancement and noise reduction together. The pictures look very convincing. Basler has currently a single-lane FPGA implementation with a throughput of 140 MPix/s using 880 Cyclone V logic cells and a quad lane implementation with a throughput of 400 MPix/s using 2600 logic cells. Jörg says, Basler is interested in licensing, cross-licensing or technology exchange.