US5001367 "High speed complementary field effect transistor logic circuits" filed in 1989 and describing an inverter chain with a sequential size scaling.
US5030853 "High speed logic and memory family using ring segment buffer" filed in 1990, describing an inverter chain with a positive feedback.
US5391949 "Differential latching inverter circuit" filed in 1995, describing a latched logic buffer.
Neither patent has a direct relation to the image sensor technology.
