4.1 MOS Capacitor Deep Trench Isolation for CMOS Image Sensors
N. Ahmed, F. Roy, G-N. Lu*, B. Mamdy, J-P. Carrere, A. Tournier, N. Virollet, C. Perrot, M. Rivoire, A. Seignard**, D. Pellissier-Tanon, F. Leverd and B. Orlando, STMicroelectronics, *CNRS, **CEA-LETI
This paper proposes the integration of MOS Capacitor Deep Trench Isolation (CDTI) as a solution to boost image sensors’ pixels performances. We have investigated CDTI and compared it to oxide-filled Deep Trench Isolation (DTI) configurations, on silicon samples, with a fabrication based on TCAD simulations. The experiment measurements evaluated on CDTI without Sidewall Implantation exhibit very low dark current (~1aA at60°C for a 1.4μm pixel), high full-well capacity (~12000e-), and it shows quantum efficiency improvement compared to DTI configuration.
4.2 Three-Dimensional Integrated CMOS Image Sensors with Pixel-Parallel A/D Converters Fabricated by Direct Bonding of SOI Layers
M. Goto, K. Hagiwara, Y. Iguchi, H. Ohtake, T. Saraya*, M. Kobayashi*, E. Higurashi*, H. Toshiyoshi* and T. Hiramoto*, NHK Science and Technology Research Laboratories, *The University of Tokyo
We report the first demonstration of three-dimensional integrated CMOS image sensors with pixel-parallel A/D converters. Photodiode and inverter layers were directly bonded to provide each pixel with in-pixel A/D conversion. The developed sensor successfully captured images and confirmed excellent linearity with a wide dynamic range of more than 80 dB.
4.3 High Sensitivity Image Sensor Overlaid with Thin-Film Crystalline-Selenium-based Heterojunction Photodiode
S. Imura, K. Kikuchi, K. Miyakawa, H. Ohtake, M. Kubota, T. Okino*, Y. Hirose*, Y. Kato* and N. Teranishi**, NHK Science and Technology Research Laboratories, *Panasonic Corporation, **University of Hyogo
We developed a stacked image sensor on the basis of thin-film crystalline-selenium (c-Se) heterojunction photodiode. Tellurium-diffused crystallization of producing uniform c-Se films was used to fabricate c-Se-based photodiodes laminated on complementary metal-oxide-semiconductor (CMOS) circuits, and we present herein the first high-resolution images obtained with such devices.
4.4 9.74-THz Electronic Far-Infrared Detection Using Schottky Barrier Diodes in CMOS
Z. Ahmad, A. Lisauskas*, H.G. Roskos* and K.K. O, University of Texas at Dallas, *JWG University
9.74-THz fundamental electronic detection for Far-Infrared (FIR) radiation is demonstrated. The detection along with that at 4.92 THz was realized using Schottky-barrier diode detection structures formed without any process modifications in CMOS. Peak optical responsivity (Rv) of 383 and ~14V/W at 4.92 and 9.74THz have been measured. The Rv at 9.74THz is 14X of that for the previously reported highest frequency electronic detection. The shot noise limited NEP at 4.92 and 9.74THz is ~0.43 and ~2nW/√Hz.
4.5 Experimental Demonstration of a Stacked SOI Multiband Charged-Coupled Device
C.-E. Chang, J. Segal*, A. Roodman*, C. Kenney* and R. Howe, Stanford University, *SLAC National Accelerator Laboratory
Multiband light absorption and charge extraction in a stacked SOI multiband CCD are experimentally demonstrated for the first time. This proof of concept is a key step in the realization of the technology which promises multiple-fold efficiency improvements in color imaging over current filter- and prism-based approaches.
4.6 Enhanced Time Delay Integration Imaging using Embedded CCD in CMOS Technology
P. De Moor, J. Robbelein, L. Haspeslagh, P. Boulenc, A. Ercan, K. Minoglou, A. Lauwers, K. De Munck and M. Rosmeulen, IMEC
Imec developed a new imager platform enabling the monolithic integration of 130 nm CMOS/CIS with charge coupled devices (CCD). The process module was successfully developed and the potential of this embedded CCD in CMOS (eCCD) was demonstrated with the fabrication of a time delay integration (TDI) imager.
10.1 Jot Devices and the Quanta Image Sensor (Invited)
J. Ma, D. Hondongwa and E. Fossum, Thayer School of Engineering at Dartmouth
The Quanta Image Sensor (QIS) concept and recent work on its associated jot device are discussed. A bipolar jot and a pump gate jot are described. Both have been modelled in TCAD. The pump gate jot features a full well of 200 e- and conversion gain exceeding 300 uV/e-.
10.2 SPAD Based Image Sensors
E. Charbon, Senior Member IEEE
The recent availability of miniaturized photoncounting pixels in standard CMOS processes has paved the way to the introduction of photon counting in low-cost time-of-flight cameras, robotics vision, mobile phones, and consumer electronics. In this paper we describe the technology at the core of this revolution: single-photon avalanche diodes (SPADs) and the architectures enabling SPAD based image sensors. We discuss tradeoffs and design trends, often referring to specific sensor chips and applications.
10.3 Toward 1Gfps: Evolution of Ultra-high-speed Image Sensors: ISIS, BSI, Multi-Collection Gates, and 3D-stacking
T.G. Etoh, V.T.S. Dao, K. Shimonomura, E. Charbon, C. Zhang*, Y. Kamakura and T. Matsuoka**, Ritsumeikan University, *Technical University of Delft, **Osaka University
Evolution of ultra-high-speed image sensors toward 1 Giga fps is presented with innovative technology to achieve the frame rate. The current highest frame rate is 16.7Mfps. A new sensor structure and a new driver circuit are proposed. Simulations prove that they further reduce the frame interval to 1ns.
10.4 Imaging with Organic and Hybrid Photodetectors (Invited)
S. Tedde, P. Buechele, R. Fischer, F. Steinbacher, O. Schmidt, Siemens AG
10.5 A CMOS-compatible, Integrated Approach to Hyper- and Multispectral Imaging
A. Lambrechts, P. Gonzalez, B. Geelen, P. Soussan, K. Tack and M. Jayapala, Imec
Imec has developed a process for the monolithic integration of optical filters on top of the CMOS imager sensors, leading to compact, cost-efficient and faster hyperspectral cameras with improved performance. To demonstrate the versatility of imec hyperspectral technology, prototype sensors with different filter arrangements and performance have been successfully fabricated.
10.6 Image Sensors for High-throughput, Massively-parallel DNA Sequencing: Requirements and Roadmap
A. Grot, Pacific Biosciences
The cost of DNA sequencing has dropped significantly over the last decade, due in part to advances in high performance CCD and CMOS image sensors. Key performance specifications – such as resolution, sensitivity, and frame-rate, along with the performance improvements necessary for continued cost reduction – will be discussed.
10.7 High Performance Silicon Imaging Arrays for . . . - looks like incomplete title in the agenda.
10.8 Detecting elementary particles using Hybrid Pixel Detectors at the LHC and beyond
M. Campbell, CERN
On July 4th 2012 CERN announced the discovery of the Higgs Boson at the Large Hadron Collider. Englert and Higgs were awarded the Noble Prize for Physics in 2013 for postulating the existence of the boson along with Brout (now deceased) in 1964. The discovery was made possible by the combination of a machine capable of accelerating protons to unprecedented energies, and two huge detectors, called Atlas and CMS, able of record unambiguously the energy and location of the particle tracks produced by the collisions. Every 50ns bunches of protons are made to collide in the heart of the giant experiments and around 20-30 proton interactions take place generating thousands of debris particles. In searching for the Higgs boson, the particles participating in a given interaction need to be detected and tagged to a given bunch crossover (BCO). The innermost regions of the experiments are equipped with hybrid pixel detectors. This paper will provide a brief overview of the large scale hybrid pixel detector systems used at the LHC experiments. It will also describe how the same hybrid pixel detector approach is used in applications beyond high energy particle physics.
26.3 High Performance Metal Oxide TFT and its Applications for Thin Film Electronics
G. Yu, C.-L. Shieh, J. Musolf, F. Foong, T. Xiao, G. Wang, K. Ottosson, CBRITE Inc.
Recent progress on metal-oxide TFT with mobility and stability as good as LTPS-TFT and with uniformity and off current as good as pristine a-Si TFT will be presented. Their applications for high pixel density displays and image arrays are discussed with emphasis on pixel and peripheral circuits with analog functions.
The conference press kit shows a preview of NHK paper #4.2 3D "Pixel-Parallel" Image Processing:
"The resolutions and frame rates of CMOS image sensors have increased greatly to meet demands for higher-definition video systems, but their design may soon be obsolete. That’s because photodetectors and signal processors lie in the same plane, on the substrate, and many pixels must time-share a signal processor. That makes it difficult to improve signal processing speed. NHK researchers developed a 3D parallel-processing architecture they call “pixel-parallel” processing, where each pixel has its own signal processor. Photodetectors and signal processors are built in different vertically stacked layers. The signal from each pixel is vertically transferred and processed in individual stacks. 3D stacking doesn’t degrade spatial resolution, so both high resolution and a high frame rate are achieved. 3D stacked image sensors have been reported previously, but they either didn’t have a signal processor in each stack or they used TSV/microbump technology, reducing resolution. NHK will discuss how photodiode and inverter layers were bonded with damascened gold electrodes to provide each pixel with analog-to-digital conversion and a pulse frequency output. A 64-pixel prototype sensor was built, which successfully captured video images and had a wide dynamic range of >80 dB, with the potential to be increased to >100 dB."
